I2S1_RX_SCK_IN_SEL=I2S_REGISTER, I2S1_TX_SCK_IN_SEL=I2S_REGISTER, I2S0_TX_SCK_IN_SEL=I2S_REGISTER, I2S0_RX_SCK_IN_SEL=I2S_REGISTER, CTOUTCTRL=COMBINE_SCT_AND_TIME, ETHMODE=MII, EMC_CLK_SEL=DIVIDE_BY_1
Chip configuration register 6. Controls multiple functions : Ethernet interface, SCT output, I2S0/1 inputs, EMC clock.
| ETHMODE | Selects the Ethernet mode. Reset the ethernet after changing the PHY interface. All other settings are reserved. 0 (MII): MII 4 (RMII): RMII |
| RESERVED | Reserved. |
| CTOUTCTRL | Selects the functionality of the SCT outputs. 0 (COMBINE_SCT_AND_TIME): Combine SCT and timer match outputs. SCT outputs are Red with timer outputs. 1 (SCT_OUTPUTS_ONLY): SCT outputs only. SCT outputs are used without timer match outputs. |
| RESERVED | Reserved. |
| I2S0_TX_SCK_IN_SEL | I2S0_TX_SCK input select 0 (I2S_REGISTER): I2S Register. I2S clock selected as defined by the I2S transmit mode register Table 960. 1 (BASE_AUDIO_CLK_FOR_I): BASE_AUDIO_CLK for I2S transmit clock MCLK input and MCLK output. The I2S must be configured in slave mode. |
| I2S0_RX_SCK_IN_SEL | I2S0_RX_SCK input select 0 (I2S_REGISTER): I2S Register. I2S clock selected as defined by the I2S receive mode register Table 961. 1 (BASE_AUDIO_CLK_FOR_I): BASE_AUDIO_CLK for I2S receive clock MCLK input and MCLK output. The I2S must be configured in slave mode. |
| I2S1_TX_SCK_IN_SEL | I2S1_TX_SCK input select 0 (I2S_REGISTER): I2S register. I2S clock selected as defined by the I2S transmit mode register Table 960. 1 (BASE_AUDIO_CLK_FOR_I): BASE_AUDIO_CLK for I2S transmit clock MCLK input and MCLK output. The I2S must be configured in slave mode. |
| I2S1_RX_SCK_IN_SEL | I2S1_RX_SCK input select 0 (I2S_REGISTER): I2S register. I2S clock selected as defined by the I2S receive mode register Table 961. 1 (BASE_AUDIO_CLK_FOR_I): BASE_AUDIO_CLK for I2S receive clock MCLK input and MCLK output. The I2S must be configured in slave mode. |
| EMC_CLK_SEL | EMC_CLK divided clock select (see Section 21.1). 0 (DIVIDE_BY_1): Divide by 1. EMC_CLK_DIV not divided. 1 (DIVIDE_BY_2): Divide by 2. EMC_CLK_DIV divided by 2. |
| RESERVED | Reserved. |